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In Stock

RoHS

Mfr.	Mfr. No:	Qty	Ext Total

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AS4C32M16D2C-25BCN

Name: Alliance Memory AS4C32M16D2C-25BCN
Brand: Alliance Memory
SKU: 913-S4C32M16D2C25BCN
Price: 4.52 USD
Availability: InStock

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Mouser No:

913-S4C32M16D2C25BCN

Mfr. No:

AS4C32M16D2C-25BCN

Mfr.:

Alliance Memory

Description:

DRAM DDR2, 512Mb, 32M x 16, 1.8V, 84-ball BGA, 400 MHz, Commercial Temp - Tray

Datasheet:

AS4C32M16D2C-25BCN Datasheet (PDF)

ECAD Model:

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More Information

Learn more about Alliance Memory AS4C32M16D2C-25BCN

In Stock: 198

Stock:: 198 Can Dispatch Immediately

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Factory Lead Time:: 6 Weeks Estimated factory production time for quantities greater than shown.

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Pricing (USD)

Qty.	Unit Price	Ext. Price
	$4.52	$4.52
	$4.18	$41.80
	$4.05	$101.25
	$3.97	$198.50
	$3.86	$386.00
	$3.74	$781.66
	$3.65	$1,525.70
	$3.62	$3,782.90
	$3.45	$8,652.60

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR2
Memory Size:	512 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	400 MHz
Package/Case:	FBGA-84
Organisation:	32 M x 16
Access Time:	400 ps
Supply Voltage - Min:	1.7 V
Supply Voltage - Max:	1.9 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 85 C
Packaging:	Tray
Brand:	Alliance Memory
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	209
Subcategory:	Memory & Data Storage
Supply Current - Max:	75 mA

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Datasheet

AS4C32M16D2C-25BCN Datasheet (PDF)

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CAHTS:: 8542320020
USHTS:: 8542320032
MXHTS:: 8542320299
ECCN:: EAR99

AS4C SDRAM

Alliance Memory AS4C SDRAM is high-speed CMOS synchronous DRAM containing 64Mbits, 128Mbits, or 256Mbits. They are internally configured as 4 banks of 1M, 2M, or 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented, accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command.