IXFP5N50P3

Name: IXYS IXFP5N50P3
Brand: IXYS
SKU: 747-IXFP5N50P3
Price: 3.12 USD
Availability: Discontinued

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Mouser No:

747-IXFP5N50P3

Mfr. No:

IXFP5N50P3

Mfr.:

IXYS

Description:

MOSFETs Polar3 HiPerFET Power MOSFETs

Lifecycle:

NRND:

Not recommended for new designs.

Datasheet:

IXFP5N50P3 Datasheet

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	IXYS
Product Category:	MOSFETs
RoHS:
Technology:	Si
Mounting Style:	Through Hole
Package/Case:	TO-220-3
Transistor Polarity:	N-Channel
Number of Channels:	1 Channel
Vds - Drain-Source Breakdown Voltage:	500 V
Id - Continuous Drain Current:	5 A
Rds On - Drain-Source Resistance:	1.65 Ohms
Vgs - Gate-Source Voltage:	30 V
Vgs th - Gate-Source Threshold Voltage:	5 V
Qg - Gate Charge:	6.9 nC
Minimum Operating Temperature:	- 55 C
Maximum Operating Temperature:	+ 150 C
Pd - Power Dissipation:	114 W
Channel Mode:	Enhancement
Tradename:	HiPerFET
Packaging:	Tube
Brand:	IXYS
Configuration:	Single
Fall Time:	12 ns
Forward Transconductance - Min:	2.5 S
Product Type:	MOSFETs
Rise Time:	13 ns
Series:	IXFP5N50
Factory Pack Quantity:	50
Subcategory:	Transistors
Typical Turn-Off Delay Time:	28 ns
Typical Turn-On Delay Time:	14 ns
Unit Weight:	2 g

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Datasheet

IXFP5N50P3 Datasheet

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Compliance Codes

CNHTS:: 8541290000
CAHTS:: 8541290000
USHTS:: 8541290065
JPHTS:: 8541290100
KRHTS:: 8541299000
TARIC:: 8541900000
MXHTS:: 8541900299
ECCN:: EAR99

Origin Classifications

Country of Origin:: Korea, Republic of
Assembly Country of Origin:: Not available
Country of Diffusion:: Not available

The country is subject to change at the time of shipment.

PolarP3™ HiPerFET™ Power MOSFETs

IXYS PolarP3™ HiPerFET™ Power MOSFETs are the latest addition to the benchmark high-performance Polar-Series for the product portfolio between 300V, 500V, and 600V. The high Figure of Merit (FOM), which is the multiplication of Q_g and R_DS(on), provides an excellent alternative to weaker super junction technologies. These PolarP3 HiPerFETs demonstrate up to a 12% reduction in on-state resistance (R_dson), a 14 percent reduction in gate charge (Q_g) and as high as a 20 percent increase in maximum power dissipation (P_d). Lower thermal resistances are also achieved due to reduced chip thicknesses, increasing the total power density of the device.