SN74LV8T594QPWRQ1

Texas Instruments
595-SN74LV8T594QPWQ1
SN74LV8T594QPWRQ1

Mfr.:

Description:
Counter Shift Registers Automotive 1.65V-to- 5V eight-channel sh

Lifecycle:
New At Mouser
ECAD Model:
Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.

In Stock: 2,673

Stock:
2,673 Can Dispatch Immediately
Factory Lead Time:
12 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 3000)

Pricing (USD)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
$1.83 $1.83
$1.17 $11.70
$1.04 $26.00
$0.854 $85.40
$0.744 $186.00
$0.705 $352.50
$0.592 $592.00
Full Reel (Order in multiples of 3000)
$0.514 $1,542.00
$0.502 $3,012.00
† A MouseReel™ fee of $7.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Counter Shift Registers
RoHS:  
D-Type
Serial to Parallel
8 bit
TSSOP-16
LV
5
Parallel
1.65 V
5.5 V
- 40 C
+ 125 C
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
High Level Output Current: 8 mA
Input Type: Serial
Low Level Output Current: 8 mA
Mounting Style: SMD/SMT
Number of Output Lines: 8 Line
Operating Supply Voltage: 1.65 V to 5.5 V
Product: Shift Registers
Product Type: Counter Shift Registers
Series: SN74LV8T594
Factory Pack Quantity: 3000
Subcategory: Logic ICs
Products found:
To show similar products, select at least one checkbox
Select at least one checkbox above to show similar products in this category.
Attributes selected: 0

This functionality requires JavaScript to be enabled.

CAHTS:
8542390000
USHTS:
8542390090
TARIC:
8542319000
MXHTS:
8542399999
ECCN:
EAR99

SN74LV8T594/SN74LV8T594-Q1 Shift Registers

Texas Instruments SN74LV8T594/SN74LV8T594-Q1 8-Channel Shift Registers contain an 8-bit, serial-in, parallel-out shift register. Each parallel output of the shift register is fed through a storage register before reaching the primary device outputs (QA through QH). Separate clocks (SRCLK and RCLK) and direct overriding clear (SRCLR and RCLR) inputs are provided for both the shift and storage registers, allowing data to be loaded separately from sending it to the outputs. Additionally, the last output of the internal shift register is sent directly to the output QH’ providing a method to daisy-chain multiple shift registers.