Microchip Technology PIC32MZ W1 System-on-Chip (SoCs)

Microchip Technology PIC32MZ W1 System-on-Chips (SoCs) are high-performance, Wi-Fi MCU SoCs with a MIPS M-Class core, robust connectivity, and 2MB memory for software development. Along with a powerful core, PIC32MZ2051-W1 provides industry-leading connectivity supporting 2.4GHz 802.11 b/g/n radio modes. These devices feature a rich set of peripherals, including Ethernet, USB, ADC, CVD touch buttons, and CAN.

Features

Wireless interfaces
- PHY
  - IEEE® 802.11 b/g/n WLAN link
  - Single spatial stream of 20MHz channel bandwidth
  - External FEM support for Power Amplifier (PA), Low Noise Amplifier (LNA), and Transmitter/Receiver (TX/RX) switch
  - 2.4GHz (2400MHz to 2483.5MHz) ISM band
- MAC
  - Infrastructure BSS STA mode
  - Soft-AP mode functionality
  - Active and passive scanning
  - Transmit power control support over temperature and voltage
- Security
  - WPA3 personal (SAE and PMF-802.11w)
  - WPA2 personal with options for WPA compatibility and PMF
  - WEP
- Harmony Networking
  - Out-of-box support for MPLAB® Harmony v3 TCP/IP stack
  - TLS v1.2 with symmetric/asymmetric crypto acceleration
- Wi-Fi power save modes
  - Wireless sleep mode (WSM)
  - Wireless deep sleep mode (WDS)
- Wi-Fi time-stamping support
200MHz, MIPS32® M-Class microprocessor core
- 16KB I-Cache, 16KB D-Cache
- Fixed mapping translation (FMT) based MMU for optimum embedded OS execution
- microMIPS™ mode for up to 35% smaller code size
- DSP-enhanced core
  - 4x 64-bit accumulators
  - Single-cycle MAC, saturating and fractional math
- Code-efficient (C and assembly) architecture
On-chip Flash and SRAM
- PIC32MZ1025W104
  - 1MB Flash program memory
  - 64KB boot program Flash
  - 256KB SRAM (program and data)
  - 64KB data buffer (DBF)
  - Dedicated buffer for peripherals
- PIC32MZ2051W104
  - 2MB Flash program memory
  - 128KB boot program Flash
  - 512KB SRAM (program and data)
  - 128KB data buffer (DBF)
Power management and system recovery
- Low-power modes (dream, sleep, deep sleep, and extreme deep sleep)
- 8KB context SRAM for context storage under low power modes
- Deep sleep mode
  - 32x semaphore registers (32-bit wide) for context storage
  - 1.9µA (typical) current consumption
- PIC32MZ W1 SoC utilizes a 32-bit semaphore register for context storage with the following current consumption values in the extreme deep sleep mode
  - 0.71µA (typical) for PIC32MZ1025W104132
  - 1.06µA (typical) for PIC32MZ2051W104132
- Integrated power-on reset (POR), brown-out reset (BOR), zero-power BOR (ZPBOR), and programmable low voltage detect (PLVD)
- Secondary oscillator and fail-safe clock
- Fast power-up and brown-out recovery
Security
- Hardware accelerated security modes (with built-in DMA support)
- Crypto engine with true random number generator (TRNG) for data encryption/decryption and authentication (AES, 3DES, SHA, MD5, and HMAC)
- AES modes
  - Electronic codebook (ECB)
  - Cipher block chaining (CBC)
  - Counter mode (CTR)
  - Cipher feedback mode (CFB)
  - Output feedback mode (OFB)
  - Galois/counter mode (GCM)
- Hardware accelerated public key cryptography with support for:
  - 16-DSP multipliers configuration
  - 256-bit ECC/ECDH/ECDSA/Curve25519
  - 256-bit Ed25519
  - 512-bit ECC/ECDH/ECDSA generation

Clock management
- 40MHz primary oscillator (POSC)
- 32.768kHz secondary oscillator (SOSC)
- Power-up timer (PWRT) and oscillator start-up timer (OST)
- Fail-safe clock monitor (FSCM)
- On-chip clock sources
  - 8MHz fast RC (FRC) oscillator
  - 32.768kHz low-power RC (LPRC) oscillator
- Programmable PLLs and oscillator clock sources
- Independent watchdog timer (WDT), deadman timer (DMT), and independent deep sleep watchdog timer
- Fast wake-up and start-up
- Support for precise reference clocks to external devices
Direct memory access (DMA)
- 8x channels with automatic data size detection
- Programmable 32-bit cyclic redundancy check (CRC)
Advanced analog 12-bit ADC module
- 2x MSPS with 2x sample and hold (S&H) circuits (1x dedicated and 1x shared)
- Up to 20x analog input channels
- Sleep and idle mode operations
- Multiple trigger sources
- 2x digital comparators and 2x digital filters
- Supports self-capacitance touch interface with a maximum of 18x touch buttons and 1x driven shield
Communication interfaces
- Up to 2x CAN modules (CAN and CAN-FD) with 2.0B active with DeviceNet™ addressing support
- Up to 3x UART modules (speeds up to 10Mbps), supports RS-232, RS-485, LIN 2.1, and IrDA protocols
- 1x Ethernet MAC module (10/100 Mbps) with RMII interface and dedicated DMA
  - IEEE 1588 precision time protocol (PTP)
  - Time synchronization support between Wi-Fi and Ethernet
- Up to 2x SPI (4-wire) modules with speeds up to 40MHz
- SQI configurable as an additional SPI module (60MHz)
- 1x full-speed USB 2.0 OTG interface with dedicated DMA
- 2x I²C (up to 1M baud) with SMBus support
Timers/output compare/input capture
- 7x 16-bit or up to 3x 32-bit timers/counters
- 4x output compare (OC) modules
- 4x input capture (IC) modules
- Low-power precision real-time clock and calendar (RTCC)
Input/output
- High current source/sink (up to 25mA) on all I/O pins
- Configurable open-drain, pull-up, pull-down, and slew rate controls
- External interrupts on all I/O pins
- Peripheral pin select (PPS) to enable function remap
- Up to 62x GPIO pins
Peripheral trigger generator (PTG) with 8-bit user command for scheduling complex sequences
Class B safety library support, IEC 60730
Debugger development support
- In-circuit and in-application programming
- 4-wire MIPS® enhanced JTAG interface
- Unlimited software: 8x instruction and 4x data complex hardware breakpoints
- IEEE 1149.2-compatible (JTAG) boundary scan
- iFlowtrace functionality support: off-chip buffering of iFlowTrace messages
Software and tools support
- C/C++ compiler with native DSP/fractional
- MPLAB® harmony integrated software framework
  - TCP/IP, USB, graphics, and mTouch™ middleware
  - MFi and Android™
  - RTOS kernels: Express Logic ThreadX, FreeRTOS™, OPENRTOS®, Micriµm® µC/OS™, and SEGGER embOS®
- Supports over-the-air (OTA) and over-the-host (OTH) firmware update modes
Dual row 132-pin DQFN package, 10mm x 10mm x 0.9mm
2.97V to 3.63V operating voltage range
DC to 200MHz operating frequency range
-40°C to +85°C operating temperature range